Archive for the ‘MOSFET Basics’ Category

Ultra Low Current Band Gap References Using NanoAmps of Current with Good MonteCarlo Results

Tuesday, August 11th, 2015

If you need a voltage reference when doing energy harvesting it is very helpful have a band gap reference that uses very little current.  This topology uses “Self Cascode Mosfet”  abreviated as SCM.  The LTSPICE design uses 4.5 nano Amperes and outputs a 0.6 Volt reference voltage.

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   Archive: Voltage-Reference.7z      Program = LTSPICE

Extract into directory.  Includes the required MOSFET library file.

 

LTSPICE Analysis

Vref versus Temperature

 

Voltage reference current consumption versus temperature

Monte Carlo Analysis with Cadence

  •  Note how tight the voltage control is
  • Current usage = 1 nAmpere

MC_Voltage-Reference_V09 Schem_Voltage-Reference_V09

 

Level shifter with low quiescent current

Friday, April 24th, 2015

ADI_Logo_AWP_small_112x44[1]

Analog Devices Wiki

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A slightly different implementation:

 

 

LTSPICE: Dual Modulus 8 9 Current Mode Prescaler Files – Complete Set with IBM 65nM Files Adapted from MOSIS

Monday, December 15th, 2014

 

LTSPICE: 8/9 Current Mode Prescaler Files – Complete Set with IBM 65nM Files Adapted from MOSIS
http://www.amarketplaceofideas.com/wp-content/uploads/2014/12/LTSPICE-Current-Mode-Prescaler-65-nM-IBM.7z

 

 

LTSPICE Behavioral Modeling

Saturday, December 13th, 2014

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Nap0's  Control Library

To use this the library (text file) control.lib must be placed in the directory:

.\LTC\SwCADIII\lib\sub

The symbol files contained in control.zip must be placed in the directory:

.\LTC\SwCADIII\lib\sym\control 

(best in the new to be added directory control, so these new blocks do not mix up with the regular components).

Then the symbols are available to be selected amongst the regular components

Extraction of MOSFET Parameters Lab using 4007 Array

Saturday, November 15th, 2014

Lab Document: Extraction of MOSFET Parameters using 4007 Array

My PDF Solution – Warning Will Robinson:  I never get 100% correct!

The following two measurements are where the MOSFET is in saturation and use the 8if method to nd ISpecific. In this
case because we are looking into the MOSFET source circuit we do not have to worry about slope factor n: Simply go to the
point where gms/ID=20 and read o the current the divide by 8 to arrive at the specic current.

Part_01_Vg_2_Vd_5Part_1_Source_Drive

Vgate = 2:0 VD = 5 : Ispecific = 0:735 uAmp

Part_01_Vg_1p7_Vds_5VPart_1_Source_Drive

Vgate = 1:7 Nominal Vt VD = 5 : ISpecific = 0:92 uAmp

The triode region determination of specic current is a little more complicated. I used Vds=15mVolts which results in if = 3
and ir = 2 which is convenient in the last part of the calculation of specic current.

Part_01_Vg_2_Vds_p015Part_1_Source_Drive

Part_01_Vg_1p7_Vds_p015Part_1_Source_Drive

Unabiguous-Extraction-Vt_IfUnAmbiguous-Parameter-Circuit

Vt_vs_Vs

n_vs_Vs       

MOSFET Simulation Guide Self Defined MOSFET Model

Monday, November 3rd, 2014

I have wanted to use the SPICE MOSFET model more closely for while and found this guide: MOSFET Simulation Guide

With it I hope to be able to finally crack the problem of changing the threshold voltage.  Up till now when I have gone into the text of the model files for MOSFETs and altered Vth0 I have not seen any material change in the threshold voltage.  Obviously I am doing something wrong or do not understand how the SPICE simulator is going about its business.

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Partial solution to change threshold voltage:

Archive: This LTSPICE archive has model files that are used by using an nmos4 and pmos4 symbol.  Thus there is no subcircuit statements used in the library file.

NOTE: With this version  when I vary the threshold voltages I see the expected resultant change in the analysis output.

180nm analysis and model files 

The archive file should work straight out of the box after extraction. Make a directory and extract to it.  It has the library file, symbols and an LTSPICE test circuit.

 

 

Notes

  • The unaltered diode connected voltages with 10uAmps agrees with both methodologies.

A 180 Nanometer MOSFET Model – Using TSMC Transistor Models from MOSIS in LT Spice

Sunday, November 2nd, 2014

If I use LTspice do I have to modify the SPICE models that I download from MOSIS? 

The models I download from CMOSedu.com work great with LTspice but I want to try some other technologies.

Yes, but you will have to change the

  • Change Level = 49 to Level = 8 for the BSIM3 models you download from MOSIS at: http://www.mosis.com/requests/test-data. 
  • For the BSIM4 models LTspice uses Level = 54 which is what MOSIS supplies so no change is needed.  

In any case I would download the models, draft a ring oscillator, and compare the simulated oscillation frequency to the measured value reported by MOSIS in these files to verify that the models are working correctly.

 

Archive: The LTSPICE library file made up from MOSIS files and LTSPICE test analysis .asc file: 180nM-NMOS-PMOS-T92Y-MOSIS-LTSPICE-Files-V2.7z   

The archive file should work straight out of the box after extraction. Make a directory and extract to it.  It has the library file, symbols and an LTSPICE test circuit.

NOTE: When I vary the threshold voltage of the models with this version I do not see any changes in FET analysis.  I suspect something is not quite right with this setup.  No errors are flagged and everything runs.

 

Archive: This LTSPICE archive has model files that are used by using an nmos4 and pmos4 symbol.  Thus there is no subcircuit statements used in the library file.

NOTE: With this version  when I vary the threshold voltages I see the expected resultant change in the analysis output.

180nm analysis and model files 

The archive file should work straight out of the box after extraction. Make a directory and extract to it.  It has the library file, symbols and an LTSPICE test circuit.

Notes from the process follow. If you want to recreate the process for other MOSIS files they will be helpful.

Research Links

Model Files – No modifications. As is from MOSIS

Notes

  • To bring up the components attributes editor  for a part hold control button down and right click on the part.  Set the Prefix = X to set the components attributes editor to come up each time you right click on the part.

 

Auxiliary Links

1.2 Volt Band Gap Reference After the Start Up Circuit is fixed

Monday, October 6th, 2014

Report Delivered for this project here

This entry records the steps taken after the above report was delivered.

BookSeeBookSee

TN3 was too long previous to this fix. Thus TN5 was not shutting off sufficiently and drawing too much current off of the current mirror.

Next Steps:

  • Redo startup transient analysisResearch Links

     

     
  • Redo Monte Carlo analysis including startup circuit
  • Go over the circuit for any possible reduction in sizes in the diodes and resistors.

 

Transient Analysis Redo Results

  • 1 to 1.8V supply voltage in 0.1 Volt steps.
  • About 0.5 mSec to turn on

Tweaking Monte Carlo V2 for output concavityResearch Links

 

Research 0L0inks

Tweaking Monte Carlo V2 for output concavity

 

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Research LinksResearch LinksResearch Links

 

Round Two Monte Carlo Results

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  • 968 in the desired working range
  • 32 versions exhibited in the bins: 47,62,93 mV

 

Preliminary Layout

  • The big rectangles are the diode connected bjt's
  • The little rectangles are the FETS
  • The long thin red lines are the resistors

FETs as Diodes

  • One way around the huge diodes would be to use nmos fets in weak inversion and diode connected.  Their characteristic is exponential under these circumstances and the worst case threshold voltage is 150mV less than the huge diode drop.  I am not sure if this is practical or not in actual practice but the simulation below looks good.
  • Resistor values had to be altered.  The large resistors can be reduced from around 12 MOhm down to about 3 MOhm.

  • The FET mismatch leads to the following Monte Carlo distribution.  Looks like I need to make the "diode" FETs bigger.

 

DIPDNW in the diode position

  • Appears to be 1/60 the area of the divpnp version

Monte Carlo Analysis @T=27 degrees C shows it well behaved more or less.  Still has issue with startup at times.

Monte Carlo Analysis @T=80 degrees C shows it well behaved.  Distribution at the low end it gone. 

 

Monte Carlo Analysis @T=0 degrees C shows markedly more false starts than higher temperatures

 

 

MOSFET: Analog Electronics with LabView

Saturday, September 13th, 2014

A quicky guide to the many configurations of MOSFET's.

Analog Electronics with Labview

BSIM3 MOSFET Model

Sunday, July 20th, 2014

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