MOSFET Transistor Array CD4007 Parameters – Level 8 Spice Models with LTSpice Files

Level 8 MOSFET models for the PMOS and NMOS FETs in the CD4007 mosfet array chip courtesy of Dr Lynn Fuller of R.I.T.

  • LTSpice Schematic file – All the model parameters are included as spice directives on the schematic so this should be portable and run right out of the box on your machine.  
  • Plot Specification file – goes with the schematic file and plots the I-V characteristic of the PMOS FET and gm/Id which allows the specific current to be calculated

Research Links  RIT Model

Research Links

 

From Foty 1987: Device parameters for this version of the CD4007 are:

  • W = 190 pm
  •  L = 4.0 pm
  • tOx =1200 A
  • NA = 2.8 X 10^16 (boron).

From Foty 1989: Device parameters for this version of the CD4007 are: 

  • W = 495 pm
  • L = 6.35 pm
  • to = 120 nm
  • ND = 3.0 X lOI5 (phosphorus)

MOSFET SubThreshold Slope Measurement Lab Using SPICE

MOSFET-Gm-Over-Id.7z Archive with this file included Run: Diode-Connected-FET-SubVt_Slope.asc   Diode Connected MOSFET The subthreshold slope is a feature of a FET's current–voltage characteristic. In the subthreshold region the drain current behaviour – though being controlled by the gate terminal – is similar to the exponentially increasing current of a forward biased diode. Therefore a plot of logarithmic drain current versus gate voltage with drain, source, Read more…