The following cut and paste from the calendar should only be used as a guide. It can change. Appears the test date may be changed but that may be in error. USE THE GIGANTIC LINK ABOVE FOR CRITICAL PATH ITEMS.
12/11/13 Início do período de inscrições.
12/01/14 Fim do período de inscrições. [PRORROGADA ATÉ O DIA 27/01]
30 e 31/01/14 Prova online de seleção
07/02/14 Divulgação dos selecionados da 1ª Chamada. Os candidatos selecionados receberão um e-mail solicitando a confirmação de participação e o envio de documentação complementar escaneada.
06/03/14 Matricula Presencial, apresentação de documentos oficiais e orientações.
10/03/14 Início do Curso
28/02/15 Fim do Curso.
Summary: The Brazilian push into ICs seems to be to use the Cadence design classes in a 1 year program.
- CTI Archer website
- CTI Archer on LinkedIn
- Search LinkedIn: CTI Renato Archer : People who have had association with CTI Renato Archer
- CTI – apresentacao "Design House"
- Linkin Connection #1 – he is professor at University Teacher at UNOESC in Chapeco Santa Catarina
- LinkedIn: Denise Alves – this person attended CTI Archer
- LinkedIn: Floripa Design House Floripa Design House website
- WhitePaper: Brazil Design Houses Program
- CEITEC – RFID and RFIC semiconductor fab supported by the government in Rio Grande do Sul
- Idea Electronic Systems : Independent IC design house in Campinas specializing in converters
- Silicon Reef – In Recife
- LinkedIn: HT Micron HT Micron – In Sao Leopoldo RS
- LinkedIn: Six Semicondutores – Six Semicondutores – in Minas Gerais
- UFSC: Programa de Pós-Graduação em Engenharia Elétrica
- UFSC Integrated Circuit Laboratory – You must apply to the post graduate program at UFSC
- Werner Von Braun Centro de Pesquisas Advancadas
- Núcleo de Projeto de Circuitos Integrados – could not find a link
CI Initiative – The CT1 and CT2 programs look to be little more than Cadence training programs augmented by an internship afterwards
- CT1 – Rio Grand do Sul: program runs approximately August to August
- CT2 – Sao Paulo: program runs approximately March to March: FAQ CT2
I called CT1: Talked with: Frederico Laydner – He mentioned:
- Even the foreign students get the 2000R$ per month stipend.
- The competition test has approximately 160 people competing for 80 slots. Not too bad compared to what I thought!
- A CT3 is being added in San Andre Sao Paulo.
Links: Notes on various processes necessary to enter Brazilian IC design programs
- Registering a Curriculum Latte on https://wwws.cnpq.br/cvlattesweb/pkg_cv_estr.inicio
- "Legalization" of school documents to allow them to be accepted in Brazil requires trip to Consulate in Chicago.
- University of Cincinnati: Request for replacement diploma
List of DH's – Design Houses – There are 22 Design houses distributed throughout the country
Correspondence – Felipe Orlando
The program has 3 phases and work like this:
- First phase: you learn about the tools from cadence and about the theory from the ICs. This phase take 5 months.
- Second phase: you will apply what you have learn in a project that they will give you, You will have to do by yourself and this will take 6 months.
- The last phase, you will work on a "design house", that is a company where you will do a internship for 1 year.
In all the phases, you will have a scholarship from the government. About if you can do the program, I can say a little. Now on the program there is 40 students, about half are from another country. I think that doesn´t have any problem with you apply to this program. But you will need to wait for the program start to receive the appliance, that will be on november, I think. You can get better answers with our manager, Jose Luis Ramirez Bohorquez.
Application to the Program
Recommended books from the CTI Renato Archer FAQ for the Qualifying test:
- CMOS VLSI Design: A Circuits and Systems Perspective – Neil Weste, David Harris
- Digital Integrated Circuits: A Design Perspective – Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic
- Microeletrônica – Adel S. Sedra, Kenneth C. Smith
- Computer Organization and Design: The Hardware/Software Interface – David A. Patterson, John L. Hennessy
- Example Analog Qualifying Test
- Example Digital Qualifying Test – Missing Images
- Example English Test