Electronics
LTSPICE Behavioral Modeling
Research Links
- Analog Behavioral Modeling
- Undocumented LTSPICE
- Google: ltspice digital behavioral models
- HSPICE behavioral modeling
- Nap0's control library
Nap0's Control Library
To use this the library (text file) control.lib must be placed in the directory:
.\LTC\SwCADIII\lib\sub
The symbol files contained in control.zip must be placed in the directory:
.\LTC\SwCADIII\lib\sym\control
(best in the new to be added directory control, so these new blocks do not mix up with the regular components).
Then the symbols are available to be selected amongst the regular components
Design Tools
Setting LTspice up for use with Electric
Research Links
- Open source IC design flow
- Using MOSIS models with LTSPICE – you will have to change the Level = 49 to Level = 8 for the BSIM3 models you download from MOSIS.
- MOSIS Test Data
- Google Search: LTSPICE MOSIS
- Setting LTspice up for use with Electric
- Electric HomePage
- Electric VLSI Tutorial
LTspice is provided courtesy of Linear Technology, Inc. and authored by Mike Engelhardt. Possible contact for topo.
Engineering
Extraction of MOSFET Parameters Lab using 4007 Array
Lab Document: Extraction of MOSFET Parameters using 4007 Array
My PDF Solution – Warning Will Robinson: I never get 100% correct!
The following two measurements are where the MOSFET is in saturation and use the 8if method to nd ISpecific. In this
case because we are looking into the MOSFET source circuit we do not have to worry about slope factor n: Simply go to the
point where gms/ID=20 and read o the current the divide by 8 to arrive at the speci c current.
Vgate = 2:0 VD = 5 : Ispecific = 0:735 uAmp
Vgate = 1:7 Nominal Vt VD = 5 : ISpecific = 0:92 uAmp
The triode region determination of speci c current is a little more complicated. I used Vds=15mVolts which results in if = 3
and ir = 2 which is convenient in the last part of the calculation of speci c current.
Electronics
LTspice Modeling a transformer
I had some issues getting a simple transformer model to run under LTSPICE.
| Archive: Ideal-Transformer.asc Uses only standard LTSPICE parts. Should work straight out of the box. |
Research Links
Random Finds
- University of Evansville LTSpice IV Library and Tutorials
- SPICE-Simulation using LTspice IV
- SPICE Circuit handbook – Chapter 01 – spice-circuit-handbook-steven-sandler Originally found here
- SPICE Circuit handbook – Chapter 02
- SPICE Circuit handbook – Chapter 03
- SPICE Circuit handbook – Chapter 04
- SPICE Circuit handbook – Chapter 05
- SPICE Circuit handbook – Chapter 06
- SPICE Circuit handbook – Chapter 07
- SPICE Circuit handbook – Chapter 08
- SPICE Circuit handbook – Chapter 09
- SPICE Circuit handbook – Chapter 10
Electronics
MOSFET Simulation Guide Self Defined MOSFET Model
I have wanted to use the SPICE MOSFET model more closely for while and found this guide: MOSFET Simulation Guide
With it I hope to be able to finally crack the problem of changing the threshold voltage. Up till now when I have gone into the text of the model files for MOSFETs and altered Vth0 I have not seen any material change in the threshold voltage. Obviously I am doing something wrong or do not understand how the SPICE simulator is going about its business.
Research Links
- PDF: MOSFET Simulation Guide – Self Defined MOSFET
- SPICE MOSFET model parameters
- A 180 Nanometer MOSFET Model – Using TSMC Transistor Models from MOSIS in LT Spice
- LTspice Tutorial explains how to import third party models into LTspice
- Creating LTSPICE MOSFET Models
Partial solution to change threshold voltage:
|
Archive: This LTSPICE archive has model files that are used by using an nmos4 and pmos4 symbol. Thus there is no subcircuit statements used in the library file. NOTE: With this version when I vary the threshold voltages I see the expected resultant change in the analysis output. 180nm analysis and model files The archive file should work straight out of the box after extraction. Make a directory and extract to it. It has the library file, symbols and an LTSPICE test circuit. |
Notes
- The unaltered diode connected voltages with 10uAmps agrees with both methodologies.
Design Tools
A 180 Nanometer MOSFET Model – Using TSMC Transistor Models from MOSIS in LT Spice
If I use LTspice do I have to modify the SPICE models that I download from MOSIS?
The models I download from CMOSedu.com work great with LTspice but I want to try some other technologies.
Yes, but you will have to change the
- Change Level = 49 to Level = 8 for the BSIM3 models you download from MOSIS at: http://www.mosis.com/requests/test-data.
- For the BSIM4 models LTspice uses Level = 54 which is what MOSIS supplies so no change is needed.
​In any case I would download the models, draft a ring oscillator, and compare the simulated oscillation frequency to the measured value reported by MOSIS in these files to verify that the models are working correctly.
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Archive: The LTSPICE library file made up from MOSIS files and LTSPICE test analysis .asc file: 180nM-NMOS-PMOS-T92Y-MOSIS-LTSPICE-Files-V2.7z The archive file should work straight out of the box after extraction. Make a directory and extract to it. It has the library file, symbols and an LTSPICE test circuit. NOTE: When I vary the threshold voltage of the models with this version I do not see any changes in FET analysis. I suspect something is not quite right with this setup. No errors are flagged and everything runs. |
|
Archive: This LTSPICE archive has model files that are used by using an nmos4 and pmos4 symbol. Thus there is no subcircuit statements used in the library file. NOTE: With this version when I vary the threshold voltages I see the expected resultant change in the analysis output. 180nm analysis and model files The archive file should work straight out of the box after extraction. Make a directory and extract to it. It has the library file, symbols and an LTSPICE test circuit. |
Notes from the process follow. If you want to recreate the process for other MOSIS files they will be helpful.
Research Links
- Using TSMC Transistor Models from MOSIS in LT Spice – shows the few steps involved in setting up the MOSIS files for use with LTSPICE. It is minimal procedure
- Adding New Models to LTSPICE – This page will show you how to make your own part so you do not have to share the MOSFET symbol. Helps when you do not want to have to remember as much. Faster starts when you come back after not working with for a while
- MOSIS Test Data Page
- Tips for Converting Level 49 HSPICE models to Level 7 PSpice models
- BSIM3 Parameter Table
- Model Parameter Binning
Model Files – No modifications. As is from MOSIS
- MOSIS T92Y 180nm SPICE file – the file I want to use
- MOSIS N99Y 0.25 uM SPICE file – the file used in the example of how to adapt MOSIS files. See first link above.
- tsmc180nmcmos.lib – uses tsmc-018/t92y_mm_non_epi_thk_mtl_params.txt
Notes
- To bring up the components attributes editor for a part hold control button down and right click on the part. Set the Prefix = X to set the components attributes editor to come up each time you right click on the part.
Auxiliary Links
Electronics
Current Mode Logic and Prescaler Project Notes
|
Project Report: Please note I ran out of time so the organization and writing of this report is lacking. It does cover the basics of designing an 8/9 dual modulus prescaler. |
If you improve upon this report please come back to this post and put a link to your improved version in the comments.
Research Links: CML Prescaler
- An Analysis of MOS Current Mode Logic for Low Power and High Performance Digital Logic
- A LOW POWER PRESCALER, PHASE FREQUENCY DETECTOR, AND CHARGE PUMP FOR A 12 GHZ FREQUENCY SYNTHESIZER – Evan Lee Eschenko – has a basic cml gate
- A Dynamic-Logic Frequency Divider for 5-GHz WLAN Frequency Synthesizer
- Design of MOS Current-Mode Logic Standard Cells Technology: NSC 0.18 µm CMOS9
- High-Speed CMOS Dual-Modulus Prescalers for Frequency Synthesis by Ranganathan Desikachari
- NEW CML LATCH STRUCTURE FOR HIGH SPEED PRESCALER DESIGN
- A 3.8-mW 2.5-GHz Dual-Modulus Prescaler in a 0.8 µm Silicon Bipolar Production Technology
- ECEN620: Network Theory Broadband Circuit Design
- High Speed Communication Circuits and Systems – Lecture 14 – High Speed Frequency Dividers
- Design of a 5.8 GHz Multi-Modulus Prescaler – Good discussion of how multi modulus prescaler works – block level state machine
- Frequency Dividers – Jri Lee
- Generalized Multi Modulus Dividers using 2/3 cells
- A 1.8V, 3GHz 16/17 Dual Modulus Prescaler in 0.35µm CMOS Technology – has merged Nand D Flip Flop, D Flip Flop and Merged 3-input AND & NAND D-FF topologies for the architecture realization
- A New Dual-Modulus Divider Circuit Technique – I like the way he draws the CML logic block diagrams
Research Links: CML to CMOS converter circuit
This lecture talks about how you need a level shifter for transistor inputs lower on the input ladder of CML logic.
Support Links
- lecture7 – Current mode logic – MUX, XOR, Latch
- lecture8 – Current mode logic – Latch design
- IIT Video Lectures on VLSI Broadband Communication Circuits by Prof. Nagendra Krishnapura
- 74HC193 presettable up / down counter LTSPICE files
- Binary Counter
- Avant HSPICE – Performing Behavoiral Modeling – The entire book
- A Digital Frequency Synthesizer Using Phase Locked Loop Technique – Gursharan Reehal
- Pulse swallowing frequency divider with low power and compact structure Has TSPC registers
- High Speed Communication Circuits and Systems – Lecture 14 – High Speed Frequency Dividers
Additional Links